In recent years, for the purpose of achieving higher integration and higher performance of an electronic device, such as a semiconductor device, a packaging technique, a so-called functional element built-in technique, for embedding a functional element, such as a semiconductor element, has been proposed. In a functional element built-in substrate, a functional element is embedded in the substrate, and thereby the mounting area of the functional element can be suppressed. In addition to this, other components can be further mounted on the surface of the outermost layer of the substrate, and hence the size of the substrate can be reduced. This technique is expected to be a high-density mounting technique which achieves higher integration and higher performance of an electronic device and which achieves thickness reduction, cost reduction, high-frequency measures, low stress connections, and the like, of a package.
The functional element built-in substrate can exhibit its function by being electrically connected to an external substrate (referred to as so-called “mother board” or “daughter board”). As the number of terminals of a functional element is increased in accordance with the increase in the density of terminals of the functional element, it is required that the wiring is efficiently fanned out from the functional element. As a method in which an effective fan-out configuration can be achieved to obtain connection with an external substrate, there is known a technique in which a build-up layer is provided on a functional element. The build-up layer has a role of enabling a narrow pitch of electrode terminals on a functional element, such as a semiconductor element, to be increased to a pitch of electrode terminals of an external substrate, so as to effect connection of the electrode terminals on the functional element with the electrode terminals of the external substrate. For example, as described in Patent Literature 1, a build-up layer composed of a plurality of wiring layers is provided on a semiconductor element to thereby facilitate connection with an external substrate.
Further, for the purpose of achieving higher integration and higher performance, it is required that the functional element built-in substrate not only facilitates the connection on the side of the terminals of the functional element but also facilitates the connection on the back surface side opposite to the terminals of the functional element. To cope with this, for example, Patent Literature 2 discloses, as shown in FIG. 16, a functional element built-in substrate in which a functional element 301, such as a semiconductor chip, is embedded, and which includes wiring layers 302 provided on both sides thereof, and inner vias 303 for electrically connecting the upper and lower wiring layers to each other.